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		<title>Effects of Varying I2C Pull-Up Resistors</title>
		<description>Discuss Effects of Varying I2C Pull-Up Resistors</description>
		<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html</link>
		<lastBuildDate>Tue, 21 May 2013 21:47:39 --500</lastBuildDate>
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			<title>Brian says:</title>
			<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-501</link>
			<description><![CDATA[So, is there a voltage comparator inside the I2C controller to check if the voltage has reached logic HIGH?]]></description>
			<dc:creator>Brian</dc:creator>
			<pubDate>Wed, 08 May 2013 12:47:56 --500</pubDate>
			<guid>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-501</guid>
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			<title>Wayne Truchsess says:</title>
			<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-500</link>
			<description><![CDATA[Your assumptions are correct for points 1 and 2. The key thing to remember is how long it takes to reach a logic HIGH. If you look at an ideal cycle at 100kHz, each duty cycle is 5us. Let's say your pullup resistor is too large and the RC time constant results in a rise time of 6us, you've now effectively changed the frequency to about 90kHz.]]></description>
			<dc:creator>Wayne Truchsess</dc:creator>
			<pubDate>Tue, 07 May 2013 22:16:26 --500</pubDate>
			<guid>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-500</guid>
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			<title>Arun says:</title>
			<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-499</link>
			<description><![CDATA[Thanks for your reply, Wayne. But I still have one doubt. Ideally, the logic which drives the SCL Open-Drain/OC pads need to do only the following: 1. Let the line charge to VDD through Pull-up for a fixed amount of time- the HIGH period 2. After this fixed HIGH period is elapsed, enable the drive-down transistor for a fixed amount of time- the LOW period -Repeat this 'n' times for n SCL cycles ----------------- According to my above assumptions, the HIGH Period & hence, Positive duty cycle should remain same for whatever pull-up usde. The only change to be observed is the voltage to which the SCL line is charged at the end of the HIGH Period will decrease as we go on increasing the pull-up (as rise time/RC time constant increases). ---------------------- From your explanation, it seems more like whatever logic that drives the SCL pads is sensing the voltage on the line OR in short, there is some kind of feedback to the logic as regards to the line voltage. i.e, during the HIGH period, it (the logic) continuously senses the SCL line And, only when it senses a voltage greater than some threshold, it ENABLES the Drive-down section of the pad. What do you think is happening ?]]></description>
			<dc:creator>Arun</dc:creator>
			<pubDate>Tue, 07 May 2013 16:01:17 --500</pubDate>
			<guid>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-499</guid>
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			<title>Wayne Truchsess says:</title>
			<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-498</link>
			<description><![CDATA[ Actually the frequency decreases with an increase in R. It typically affects the clock high period. Remember, if you have a 50% duty cycle and your resistance is too high, it will take longer for the circuitry to reach the defined HIGH state before it can switch to go LOW again. Since the duty cycle on the LOW side is not compensating for increased rise time you will see a net overall decrease in frequency.]]></description>
			<dc:creator>Wayne Truchsess</dc:creator>
			<pubDate>Mon, 06 May 2013 19:22:32 --500</pubDate>
			<guid>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-498</guid>
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			<title>Arun says:</title>
			<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-497</link>
			<description><![CDATA[Could you explain why the SCL frequency increases with increased R ? I was expecting that the rise time, obviously, will increase, but that should not affect the Clock HIGH & LOW Periods]]></description>
			<dc:creator>Arun</dc:creator>
			<pubDate>Mon, 06 May 2013 11:39:20 --500</pubDate>
			<guid>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-497</guid>
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			<title>Usman says:</title>
			<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-457</link>
			<description><![CDATA[Sir, God bless you for this wonderful article, congrats]]></description>
			<dc:creator>Usman</dc:creator>
			<pubDate>Tue, 29 Jan 2013 18:20:12 --500</pubDate>
			<guid>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-457</guid>
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			<title>Krishna says:</title>
			<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-443</link>
			<description><![CDATA[Wonderful stuff Mr.Wayne Truchsess.People having less knowledge on electrical signals and rise time etc., also can easily understand this.]]></description>
			<dc:creator>Krishna</dc:creator>
			<pubDate>Tue, 22 Jan 2013 00:11:09 --500</pubDate>
			<guid>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-443</guid>
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			<title>Lou says:</title>
			<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-439</link>
			<description><![CDATA[Interesting stuff but I am quite new to I2C. Can you please answer: 1) What version of the Wire library are you using? 2) What code was being run to generate the continuous clock (SCL)? 3) How does one "vary the speed" as you say?]]></description>
			<dc:creator>Lou</dc:creator>
			<pubDate>Thu, 17 Jan 2013 11:07:00 --500</pubDate>
			<guid>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-439</guid>
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			<title>Sam says:</title>
			<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-394</link>
			<description><![CDATA[So this means, if I have a Sensor that supports 400khz i2c, I should take 2,2k resistors and then its also no problem to run at slower 100khz bus speed with them ? STM32 MCU @ 3,3V VDD. And I would take 100ohms as series resistor. Is that ok ? I calculated my RP minimum is 967ohms ~ 1k. Is it better to with 1,5k then ?]]></description>
			<dc:creator>Sam</dc:creator>
			<pubDate>Fri, 21 Sep 2012 18:40:19 --500</pubDate>
			<guid>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-394</guid>
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			<title>ranjithkumar says:</title>
			<link>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-378</link>
			<description><![CDATA[Very informative articles. thanks a lot....]]></description>
			<dc:creator>ranjithkumar</dc:creator>
			<pubDate>Tue, 04 Sep 2012 08:58:02 --500</pubDate>
			<guid>http://www.dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html#comment-378</guid>
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